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rt 5047 copyright ? 2017 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds5047 - 02 july 2017 www.richtek.com 1 single output lnb supply and control voltage regulator general description the RT5047 is a highly integrated voltage regulator and interface ic, specifically design for supplying power and control signals from advanced satellite set - top box (stb) modules to the lnb down - converter in the antenna dish or to the multi - switch box. the device is consists of the independent current - mode boost controller and low dropout linear regulator along with the circ uitry required for 22 k hz tone shaping to support diseqc tm 1.x communications. the RT5047 has fault protection (over - current, over - temperature and under - voltage lockout). the RT5047 are available in a sop - 8 (exposed pad) package to achieve optimized soluti on for thermal dissipation. ordering information note : richtek products are : ? rohs compliant and compatible with the current requirements of ipc/jedec j - std - 020. ? suitable for use in snpb or pb - free soldering processes . feature s ? wide input supply voltage range : 8 v to 16 v ? output current limit of 550ma with 45ms timer ? low noise lnb output volt age (13.3v and 18.3v by sel pin , 14.3v and 19.3v by comp pin) ? ? 3% high accuracy for 0 ma to 500ma current output ? push - pull output stage minimizes 13 .3v to 18 .3v and 18 .3v to 13 .3v output transition time ? external 22 k hz tone input ? meet diseqc tm 1.x protocol ? output short circuit protection ? over - t emperature protection applications ? lnb power supply and control for satellite set - top box ? analog a nd digital satellite receivers/ satellite tv, satellite pc cards pin configuration (top view) sop - 8 (exposed pad) simplified application circuit r t 5 0 4 7 p a c k a g e t y p e s p : s o p - 8 ( e x p o s e d p a d - o p t i o n 2 ) l e a d p l a t i n g s y s t e m g : g r e e n ( h a l o g e n f r e e a n d p b f r e e ) l n b b o o s t l x v i n t o n e c o m p e n s e l g n d 2 3 4 5 6 7 8 9 v i n c b s t v i n r t 5 0 4 7 l 1 l x s e l t o n e g n d l n b c l n b m a x . 5 5 0 m a c i n 2 c i n 1 b o o s t e n v l n b d 1 d 2 d 4 d 3 d 5 c o m p
rt 5047 copyright ? 2017 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds5047 - 02 july 2017 2 marking informaton functional pin description pin no. pin name pin function 1 lnb output v oltage for lnb. 2 b oost boost o utput and t racking s upply v oltage to lnb. 3 lx switching n ode of dc - dc b oost c onverter. 4 vin power s upply i nput. 5 en lnb o utput e nable. 6 sel lnb o utput v oltage s election p in (low is for 13.3v, high is for 18.3v). 7 comp lnb output voltage compensate pin. 8 tone 22 k hz tone i nput. 9 (exposed pad) gnd ground. the e xposed p ad must be soldered to a large pcb and connected to gnd for maximum power dissipation. function al block diagram r t 5 0 4 7 g s p y m d n n r t 5 0 4 7 g s p : p r o d u c t n u m b e r y m d n n : d a t e c o d e o s c i l l a t o r 4 - s t e p s v o l t a g e s e t t i n g 2 2 k h z t o n e s h a p e g n d v i n t o n e r e f e r e n c e v o l t a g e v f b 2 v r 1 b a n d g a p r e f e r e n c e v d 2 v f b 2 d y n a m i c d r o p o u t c o n t r o l b o o s t o s c v u d v f b 1 v r 1 p w m c o n t r o l l e r d a c v d 1 l x e r r o r a m p r f 1 r f 2 l n b l i n e a r r e g u l a t o r o c p 2 o c p 1 u v l o o t p s e l e n c o m p
rt 5047 copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds5047 - 02 july 2017 www.richtek.com 3 operation the RT5047 integrates a current mode boost converter and linear regulator. use the sel pin to control the lnb voltage and t he boost converter track is at least greater 850mv than lnb voltage . the boost converter is the high efficiency pwm architecture with 700khz operation frequency . the linear regulator has the capability to source current up to 550ma during continuous operation. all the loop compen sation, current sensing, and slope compensation functions are provided internally. ocp both the boost converter and the linear regulator have independent current limit. in the boost converter (ocp1) , this is achieved through cycle - by - cycle internal curren t limit (typ. 3a) . in the linear regulator (ocp2), w hen the linear regulator exceeds ocp more than 48ms, the lnb output will be disabled and re - start after 1.8s . tone circuit this circuit is used for tone generation. use the tone pin to control output ampl itude of lnb. otp when the junction temperature reaches the critical temperature (typical ly 150 ? c ) , the boost converter and the linear regulator are immediately disabled . uvlo the uvlo circuit compares the vin with the uvlo threshold ( 7.7 v rising typically) to ensure that the input voltage is high enough for reliable operation. the 3 50mv (typ.) hysteresis prevents supply transients from causing a shutdown. pwm controller t he loop compensation, current sensing, and s lope compensation functions are provided internally.
rt 5047 copyright ? 2017 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds5047 - 02 july 2017 4 absolute maximum ratings (note 1 ) ? supply input voltage , vin -------------------------------- -------------------------------- --------------------------- ? ? 0.3 v to 28 v ? output voltage lnb, lx and b oo st pins -------------------------------- -------------------------------- ----- ? ? 0.3 v to 30v ? others pin to gnd -------------------------------- -------------------------------- -------------------------------- ---- ? ? 0.3 v to 6 v ? power dissipation, p d @ t a = 25 ? c sop - 8 (exposed pad) -------------------------------- -------------------------------- -------------------------------- ? 3.44 w ? package thermal resistance (note 2 ) sop - 8 (exposed pad) , ? ja -------------------------------- -------------------------------- -------------------------- ? 29 ? c/w sop - 8 (exposed pad) , ? j c -------------------------------- -------------------------------- -------------------------- ? 2 ? c/w ? lead temperature (soldering, 10 sec.) -------------------------------- -------------------------------- ---------- ? 260 ? c ? junction temperature -------------------------------- -------------------------------- -------------------------------- ? 150 ? c ? storage temperature range -------------------------------- -------------------------------- ----------------------- ? ? 65 ? c to 150 ? c ? esd susceptibility ( note 3 ) hbm ( human body model ) -------------------------------- -------------------------------- ------------------- 2 kv recommended operating conditions (note 4 ) ? supply input voltage -------------------------------- -------------------------------- -------------------------------- - ? 8 v to 16v ? ambient temperature range -------------------------------- -------------------------------- ----------------------- ? ? 40 ? c to 85 ? c ? junction temperature range -------------------------------- -------------------------------- ---------------------- ?? 40 ? c to 125 ? c electrical characteristics ( v in (typ.) = 12 v, v in = 8v to 16v , t a = 25 ? c, unless otherwise specified) parameter symbol test conditions min typ max unit general lnb output accuracy, load and line regulation e rr relative to selected v lnb target level, i lnb = 0 to 450ma ? 3 -- 3 % supply current i in_off en = 0, lnb output disabled -- 0.3 0.5 ma i in_on en = 1, vlnb = 18 .3v, tone = 0v -- 10 18 ma i in_on en = 1, vlnb = 18 .3v, 22 k hz tone input -- 16 28 ma boost switch on resistance r ds ( on ) i lnb = 450ma -- 150 300 m ? switching frequency f sw 600 700 800 k hz switch current limit i limsw v in = 10v, v lnb = 20.5v -- 3 -- a linear regulator voltage drop v drop v boost - v lnb , i lnb = 450ma -- 0.85 -- v output voltage rise time t r_lnb for v lnb = 13 .3v ? 1 8 .3v, c lnb = 100nf, i lnb = 450ma -- 3 10 ms output voltage pull - down time t f_lnb for v lnb = 1 8 .3v ? 13 .3v, c lnb = 100nf, i lnb = 0ma -- 3 10 ms
rt 5047 copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds5047 - 02 july 2017 www.richtek.com 5 parameter symbol test conditions min typ max unit ripple and noise on lnb output v rip_pp 20mhz b andwidth l imit (gbd) -- 20 -- mv pp load regulation v out_load v lnb = 13 .3v, i lnb = 50ma to 450ma -- 38 76 mv v lnb = 18 .3v, i lnb = 50ma to 450ma -- 45 90 line regulation v out_line v in = 9 to 14v, v lnb = 13 .3v, i lnb = 50ma ? 10 -- 10 mv v in = 9 to 14v, v lnb = 1 8 .3v, i lnb = 50ma ? 10 -- 10 protection output over - c urrent limit i lim_lnb1 v lnb = 1 3 .3v/1 8 .3v 500 550 650 ma output over - c urrent disable time t dis_on v lnb s hort to gnd -- 45 -- ms output over - c urrent disable time t dis_off v lnb s hort to gnd (gbd) -- 1800 -- ms vin under - voltage lockout threshold v uvlo v in f alling -- 7.35 -- v vin turn on threshold v in_th v in r ising -- 7.7 8 v vin under - voltage lockout hysteresis v uvlohys -- 350 -- mv otp threshold t otp -- 140 -- ? c otp hysteresis t otphys -- 15 -- ? c tone tone frequency f tone 20 22 24 k hz tone amplitude, peak to peak v tone_pp i lnb = 50 to 450ma, c lnb = 200nf 550 700 900 mv pp tone duty cycle dc tone i lnb = 0 to 450ma, c lnb = 570nf 40 50 60 % tone rise time t rtone i lnb = 0 to 450ma, c lnb = 570nf 5 10 15 ? s tone fall time t ftone i lnb = 0 to 450ma, c lnb = 570nf 5 10 15 ? s tone logic input v tone_h 1.2 -- -- v v tone_l -- -- 0.4 v tone input leakage i tonelkg -- 5 1 0 ? a enable, sel pins en logic input v en_h 1.2 -- -- v v en_l -- -- 0.4 v en input leakage i enlkg -- 5 10 ? a sel logic input v sel_h 1.2 -- -- v v sel_l -- -- 0.4 v sel input leakage i sellkg -- 5 10 ? a
rt 5047 copyright ? 2017 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds5047 - 02 july 2017 6 note 1. stresses beyond those listed absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ? ja is measured at t a = 25 ? c on a high effective thermal conductivity four - layer test board per jedec 51 - 7. ? jc is measured at the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operatin g conditions. note 5. operation at v in = 16v may be limited by power loss in the linear regulator .
rt 5047 copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds5047 - 02 july 2017 www.richtek.com 7 typical application circuit note : 1. d2, d3, d4, d5 are used for surge protection. 2. the capacitor c3 should not be less than 1 ? f for the power stability. 3. en, tone and sel are connected to microcontroller directly. v i n c b s t 2 0 f / 3 0 f v i n r t 5 0 4 7 l 1 1 0 f l x s e l t o n e g n d l n b c l n b 0 . 1 f m a x . 5 5 0 m a c i n 2 1 f c i n 1 2 x 1 0 f b o o s t e n v l n b d 1 s s 1 4 d 2 s s 1 4 d 4 s m d j 2 0 a d 3 s s 1 4 d 5 s s 1 4 1 2 3 4 5 8 6 9 ( e x p o s e d p a d ) c o m p 7
rt 5047 copyright ? 2017 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds5047 - 02 july 2017 8 typical operating characteristics boost efficiency vs. output current 60 65 70 75 80 85 90 95 100 0.00 0.10 0.20 0.30 0.40 0.50 0.60 output current (a) efficiency (%) v in = 12v, v boost = 14.3v system efficiency vs. output current 60 65 70 75 80 85 90 95 100 0.00 0.10 0.20 0.30 0.40 0.50 0.60 output current (a) efficiency (%) v in = 12v, v boost = 14.3v, v lnb = 13.3v tone amplitude vs. temperature 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 -50 -25 0 25 50 75 100 125 temperature (c) tone amplitude (v) v in = 12v, v lnb = 13.3v, tone enable tone amplitude vs. output current 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0 0.1 0.2 0.3 0.4 0.5 0.6 output current (a) tone amplitude (v) v in = 12v, v lnb = 13.3v, tone enable output voltage vs. temperature 12 13 14 15 16 17 18 19 -50 -25 0 25 50 75 100 125 temperature (c) output voltage (v) v in = 12v v lnb _18.3v v lnb _13.3v output voltage vs. output current 12 13 14 15 16 17 18 19 0.00 0.10 0.20 0.30 0.40 0.50 0.60 output current (a) output voltage (v) v lnb _13.3v v in = 12v v lnb _ 18.3v
rt 5047 copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds5047 - 02 july 2017 www.richtek.com 9 over current protect vs. temperature 0.50 0.55 0.60 0.65 0.70 -25 0 25 50 75 100 125 temperature (c) current (a) v in = 12v, v lnb = 13.3v under voltage lockout vs. temperature 7.00 7.20 7.40 7.60 7.80 8.00 -50 -25 0 25 50 75 100 125 temperature (c) under voltage lockout (v) 1 v in = 12v v lnb_ac (200mv/ div ) time (50 ? s/ div ) tone output v in = 12v v sel from 0v to 3.3v, c lnb = 0.1 ? f, v lnb from 13v to 18v v lnb (5v/ div ) v sel (2v/ div ) time (500 ? s/ div ) output voltage transition rising v in = 12v, v sel from 3.3v to 0v, clnb = 1 ? f, v lnb from 18v to 13v v lnb (5v/ div ) v sel (2v/ div ) time (500 ? s/ div ) output voltage transition falling v in = 12v v in (10v/ div ) v boost (10v/ div ) v lnb (10v/ div ) time (5ms/ div ) power on sequence
rt 5047 copyright ? 2017 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds5047 - 02 july 2017 10 v in = 12v v boost (5v/ div ) v lnb (5v/ div ) i lnb (500ma/ div ) time (500ms/ div ) over current protection
rt 5047 copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds5047 - 02 july 2017 www.richtek.com 11 application information boost converter/linear regulator the 5047 integrates a current - mode boost converter and linear regulator. use the sel pin to control the lnb voltage and t he boost converter track is at least greater 800m v than the lnb voltage . the boost converter is high efficiency pwm architecture with 700khz operation frequency . the linear regulator has the capability to source current up to 550ma during continuous operation. all the loop compensation, current sensing, and slope compensation functions are provided internally. the RT5047 has current limiting on the boost converter and the lnb output to protect the ic against short circuits. the internal mosfet will turn off when the lx current is higher than 3a cycle - by - c ycle . the lnb output will turn off when the output current higher than the 550ma and 45m s and turn - on after 1800m s automatically. in put capacitor selection the input capacitor reduces voltage spikes from the input supply and minimizes noise injection to th e converter. a 30 ? f capacitance is sufficient for most applications. nevertheless, a higher or lower value may be used depending on the noise level from the input supply and the input current to the converter. note that the voltage rating of the input capacitor must be greater than the maximum input voltage. inductor selection the inductance depends on the maximum input current. as a general rule, the inductor ripple current range is 20% to 40% of the maximum input current. if 40% is selected as an exam ple, the inductor ripple current can be calculated according to the following equations : where is the efficiency of the converter, i in(max) is the maximum input current, and iripple is the inductor ripple current. the input pe ak current can then be obtained by adding the maximum input current with half of the inductor ripple current as shown in the following equation : i peak = 1.2 x i in(max) note that the saturated current of the inductor must be greater than i peak . the inductance can eventually be determined according to the following equation : where f osc is the switching frequency. for better system performance, a shielded inductor is preferred to avoid emi problems. boost output capacitor se lection the rt5 047 boost regulator is internally compensated and relies on the inductor and output capacitor value for overall loop stability. the output capacitor is in the 30 ? f to 50 ? f range with a low esr, as strongly recommended . the voltage rating on this capacitor should be in the 25v to 35v range since it is connected to the boost v out rail. the output ripple voltage is an important index for estimating chip performance. this portion consists of two parts. one is the product of the inductor current with the esr of the output capacitor, while the other part is formed by the charging and discharging process of the output capacitor. as shown in figure 1, ? v out1 can be evaluated based on the ideal energy equalization. according to t he definition of q, the q value can be calculated as the following equation : where f osc is the switching frequency and ? i l is the inductor ripple current. bring c out to the left side to estimate the value of ? v out1 according to the following equation : out out(max) in(max) in ripple in(max) vi i = v i = 0.4 i ? ? ? ? ? ? ? ? ? ? 2 2 in out in out out(max) osc v v v l 0.4 v i f ? ? ? ? ? ? ? in l out in l out in out out1 out osc 1 1 1 q = i i i i i i 2 2 2 v 1 = c v vf ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? ? ? ? ? ?? ? ? ? ? out out1 out osc di v = cf ? ? ? ??
rt 5047 copyright ? 2017 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds5047 - 02 july 2017 12 where d is the duty cycle and is the boost converter efficiency. finally, take esr into consideration, the overall output ripple voltage can be determined by the following equation : the output capacitor, c out , should be selected accordingly. figure 1. the output ripple voltage without the contribution of esr schottky diode selection schottky diodes are chosen for their low forward - voltage drop and fast switching speed. however, when making a selection, important parameters such as power dissipation, reverse voltage rating, and pulsating peak current should all be taken into consideration. a suitable schottky diodes reverse voltage rating must be gr eater than the maximum output voltage and its average current rating must exceed the average output current. the chosen diode should also have a sufficiently low leakage current level, since it increases with temperature. under - voltage lockout (uvlo) the u vlo circuit compares the input voltage at vin with the uvlo threshold ( 7.7 v rising typically) to ensure that the input voltage is high enough for reliable operation. the 3 50mv (typ.) hysteresis prevents supply transients from causing a shutdown. once the i nput voltage exceeds the uvlo rising threshold, start - up begins. when the input voltage falls below the uvlo falling threshold, all ic internal functions will be turned off by the controller . over - current protection the rt 5 047 features an over - current protection function to prevent chip damage from high peak currents . both the boost converter and the linear regulator have independent current limit. in the boost converter, this is achieved through cycle - by - cycle internal current limit. during the on - period, the chip senses the inductor current that is flowing into the lx pin. the internal nmos will be turned off if the peak inductor current reaches the current - limit value of 3 a (typ.) .when the linear regulator exceeds 5 50 ma (typ.) more than 45ms, the lnb output will be disabled. during this period of time, if the current limit condition disappears, the o cp will be cleared and the part restarts. if the part is still in current limit after this time period, the linear regulator and boost c onverter will automatically disable to prevent the part from overheating. short circuit protection if the lnb output is shorted to ground, and more than 45 ms, the rt50 47 will be disabled 1.8s then enable automatically. over - temperature protection when the junction temperature reaches the critical temperature (typical ly 140 o c ) , the boost converter and the linear regulator are immediately disabled. w hen the junction temperature cools down to a lower temperature threshold specified, the RT5047 will be allowe d to restart by normal start operation . lnb output voltage t h e rt50 47 has voltage control function on the lnb output. this function provide s 4 levels for the common standards and compensation if the cable line has voltage drop . these voltage levels are defined in table 1 . the rise time and fall time of the vlnb is 3ms (typ.). out out in out osc di v = i esr cf ? ? ? ? ? ?? t i m e t i m e i n d u c t o r c u r r e n t o u t p u t c u r r e n t o u t p u t r i p p l e v o l t a g e ( a c ) ( 1 - d ) t s v o u t 1 i l i n p u t c u r r e n t
rt 5047 copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds5047 - 02 july 2017 www.richtek.com 13 table 1 sel pin status comp pin status lnb output voltage 0 0 13.3v 0 1 14 .3v 1 0 18.3v 1 1 19.3v tone generation the rt50 47 provide s the tone generation function , please refer to the figure 2 . set the tone pin with 22khz logic signal , the lnb linear regulator output will carry a 22khz, 700mv peak to peak signal for dis eqc 1.x communication. it can meet base - band timings of 500 ? s (100 ? s) for a one - third bit pwk coded signal period on a nominal 22khz (20 %). figure 2. tone generation options pull - down rate control the output linear stage provides approximately 40ma of pull - down capability. this ensures that the output volts are ramped from 18.3v to 13.3v in a reasonable amount of time. over - current disable time if the lnb output current exceeds 550ma, typica l, for more than 45ms, then the lnb output will be disabled and device enters a ton = 45ms/toff = 1800ms routine. it will be returned to normal operation after a successful soft - start process. t o n e s i g n a l 0 v 3 . 3 v 1 3 . 3 v o r 1 8 . 3 v 7 0 0 m v l n b t o n e s i g n a l d e t e c t t i m e v l n b c l o s e t o n e a f t e r t o n e s i g n a l d e t e c t t i m e v l n b o u t p u t t o n e w h e n t o n e s i g n a l r i s e u p ocp1=1000ma 25ms ocp2=550ma 20ms if loading is 1000ma 1800ms ocp1=1000ma 25ms ocp2=550ma 20ms ocp1=250ma 25ms ocp2=138ma 20ms if lnb is shorted to gnd 1800ms ocp1=250ma 25ms ocp2=138ma 20ms
rt 5047 copyright ? 2017 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds5047 - 02 july 2017 14 inrush current at start - up or during a lnb reconfiguration event, a transient surge current above the normal dc operating level can be provided by the ic. this current increase can be as high as 550ma, typical, for as long as required, up to a maximum of 45ms. dc current the RT5047 can handle up to 500ma during co ntinuous operation. thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and differ ence between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ? ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ? ja is the junction to ambient thermal resistance.for recommended operating condition specifications, the maximum junction temperature is 125 ? c. the junction to ambient thermal resistance, ? ja , is layout dependent. for sop - 8 (exposed pad) package, the thermal resista nce, ? ja , is 29 ? c/w on a standard jedec 51 - 7 four - layer thermal test board. the maximum power dissipation at t a = 25 ? c can be calculated by the following formula : p d(max) = (125 ? c ? 25 ? c) / ( 29 ? c/w) = 3.44 w for sop - 8 (exposed pad) package the maximu m power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ? ja . the derating curve in figure 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. figure 3. derating curve of maximum power dissipation 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb
rt 5047 copyright ? 201 7 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. ds5047 - 02 july 2017 www.richtek.com 15 layout consideration for high frequency switching power supplies, the pcb layout is important to get good regulation, high efficiency and stability. the following descriptions are the guidelines for better pcb layout. ? for good regulation, place the power components as close as possible. the traces should be wide and short enough especially for the high - cu rrent loop. ? minimize the size of the lx node and keep it wide and shorter. ? the exposed pad of the chip should be connected to a strong ground plane for maximum thermal consideration. figure 4 . pcb layout guide l n b b o o s t l x v i n t o n e c o m p s e l e n g n d v i n l 1 v o u t d 3 a n d d 4 s h o u l d b e p l a c e d a s c l o s e d a s p o s s i b l e t o v o u t f o r s u r g e p r o t e c t i o n . t h e i n d u c t o r s h o u l d b e p l a c e d a s c l o s e a s p o s s i b l e t o t h e l x p i n t o m i n i m i z e t h e n o i s e c o u p l i n g i n t o o t h e r c i r c u i t s . l x n o d e c o p p e r a r e a s h o u l d b e m i n i m i z e d f o r r e d u c i n g e m i p l a c e t h e p o w e r c o m p o n e n t s a s c l o s e a s p o s s i b l e . t h e t r a c e s s h o u l d b e w i d e a n d s h o r t e s p e c i a l l y f o r t h e h i g h - c u r r e n t l o o p . t h e c i n , c b s t a n d c l n b s h o u l d b e p l a c e d a s c l o s e d a s p o s s i b l e t o t h e r t 5 0 4 7 f o r g o o d f i l t e r . c i n 1 c i n 2 d 1 d 2 d 3 d 4 c b s t 1 c b s t 3 c b s t 2 c l n b 1 t h e e x p o s e d p a d o f t h e c h i p s h o u l d b e c o n n e c t e d t o a n a l o g g r o u n d p l a n e f o r t h e r m a l c o n s i d e r a t i o n . t h e t o n e , s e l a n d e n p i n s h o u l d b e c o n n e c t e d t o m c u o r g n d . d o n o t f l o a t i n g t h e s e p i n s .
rt 5047 copyright ? 2017 richtek technology corporation. all rights reserved. is a registered trademark of richtek technology corporation. www.richtek.com ds5047 - 02 july 2017 16 outline dimension symbol dimensions in millimeters dimensions in inches min max min max a 4.801 5.004 0.189 0.197 b 3.810 4.000 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.510 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.000 0.152 0.000 0.006 j 5.791 6.200 0.228 0.244 m 0.406 1.270 0.016 0.050 option 1 x 2.000 2.300 0.079 0.091 y 2.000 2.300 0.079 0.091 option 2 x 2.100 2.500 0.083 0.098 y 3.000 3.500 0.118 0.138 8 - lead sop (exposed pad) plastic package richtek technology corporation 14f, no. 8, tai yuen 1 st street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is curre nt and complete. richtek cannot assume responsibil ity for use of any circuitry other than circuitry entirely embodied in a richtek product. information furnished by richtek is believed to be accurate and reliable. however, no responsibility is assumed by richtek or its subsidiaries for its use; nor for an y infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of richtek or its su bsidiaries.

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